By growth of device structures on BPD free substrates, one can avoid formation of SFs during device operation decisively improving its reliability.
In FSGP-M growth technology, the BPD density can be reduced to <1 cm-2 compared to around 2000 cm-2 typically obtained in 6-inch size PVT grown substrates. By reducing the BPD density, SF expansion can largely be avoided, and reliable high power SiC devices produced.
Eliminating SF formation in the substrate will contribute to substantially increasing the reliability of high power Merged PiN Schottky diodes (MPS), PiN diodes (PN), Insulated gate bipolar transistors (IGBT) and Metal oxide semi-conductor field effect transistors (MOSFET) enabling reliable integration in volume applications over the next decade.
In the next slides, we analyze the presently used PVT growth technique and present the next generation SiC growth technique, the Fast Sublimation Growth Process (FSGP-M).