BIPOLAR DEGRADATION

Origin of bipolar degradation

During epitaxial growth Basal plane dislocations (BPDs) are propagating from the substrate to the epilayer. BPDs in the epilayer is the most important cause of bipolar degradation.

To reduce propagation of BPDs from substrate to epilayer a constriction layer is grown during initial epitaxial growth. The constriction efficiency depends on abundancy, type and orientation of BPDs in the substrate as well as conditions during constriction layer growth.

Summarizing most BPDs in the epilayer originate from:

1. Propagation of BPDs from substrate to epilayer.

2. Reconversion, BPDs constricted during initial epitaxial growth, may during device operation at high current stress reconvert (from threading edge dislocations to BPDs) and cause formation of stacking faults (SF).

Stacking fault expansion from basal plane dislocations

Stacking faults (SF) in the epitaxial layer may under high current stress1) expand and cause

  • an increase in forward voltage (VF) of bipolar SiC devices 1), 2), 4), and
  • an increase of the reverse leakage current and decrease in forward current for nominal unipolar SiC devices3), having bipolar contribution from embedded pn-junctions.

References
1) Stacking fault expansion from basal plane dislocations converted into threading edge dislocations in 4H-SiC
epilayers under high current stress Kazuya Konishi et al.
2) Imaging Stacking Fault Growth in SiC Diodes. R.E. Stahlbush, M.E. Twigg, and M. Fatemi
3) Recombination-induced stacking fault degradation of 4H-SiC merged-PiN-Schottky diodes Caldwell, J. D et al.
4) Dynamics of Forward Voltage Drift in 4H-SiC PiN Diodes J.D. Caldwell

Forward-biased current-voltage curve of a SiC PiN diode before (blue) and after (red) current stressing. Stressing consisted of 4h at 160 A/cm2 and 30s at 800 A/cm2. The inset shows a schematic cross-section of a SiC PiN diode with a stacking fault across the drift region 2).

(a) Electroluminescense image of the degraded pn diode after the forward current stress of 500A/cm2.

(b) PL image of the same diode area taken before fabrication at wavelength of 750nm. The border of the diode area is marked by the dashed line.

Reconversion of constricted BPDs

In silicon carbide power devices applied in the power classes above 1.7 kV, BPDs, constricted to TEDs during the initial epitaxial growth phase may reconvert to BPDs and cause formation of SFs at high current stress, which sooner or later may cause devices to fail 1) 2).

Conclusion
Reducing the BPD density by inserting buffer layer between substrate and epitaxial layer can reduce but not eliminate the risk of bipolar degradation.

References
1) Stacking fault expansion from basal plane dislocations converted into threading edge dislocations in 4H-SiC epilayers under high current stress Kazuya Konishi et al.
2) Imaging Stacking Fault Growth in SiC Diodes. R.E. Stahlbush, M.E. Twigg, and M. Fatemi

 

Solution

By growth of device structures on BPD free substrates, one can avoid formation of SFs during device operation decisively improving its reliability.

In FSGP-M growth technology, the BPD density can be reduced to <1 cm-2 compared to around 2000 cm-2 typically obtained in 6-inch size PVT grown substrates. By reducing the BPD density, SF expansion can largely be avoided, and reliable high power SiC devices produced.

Eliminating SF formation in the substrate will contribute to substantially increasing the reliability of high power Merged PiN Schottky  diodes (MPS), PiN diodes (PN), Insulated gate bipolar transistors (IGBT) and Metal oxide semi-conductor field effect transistors (MOSFET) enabling reliable integration in volume applications over the next decade.

In the next slides, we analyze the presently used PVT growth technique and present the next generation SiC growth technique, the Fast Sublimation Growth Process (FSGP-M).

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